Field of the Invention
The present invention relates to a liquid crystal display (LCD) device, and more particularly, to an LCD device and a method of manufacturing the same, in which a passivation layer and a pixel electrode are simultaneously formed by a single mask process using a half tone mask, and thus, manufacturing efficiency increases, and a defective contact due to loss of the pixel electrode can be prevented in a pad area.
Discussion of the Related Art
Recently, in applying a touch sensor (screen) to LCD devices, a liquid crystal panel with integrated touch sensor is developed for slimming. Particularly, an in-cell touch type LCD device that uses a common electrode (which is formed on a lower substrate) as a touch sensing electrode is developed.
FIG. 1 is a view illustrating a related art LCD device. FIG. 2 is a view illustrating a pixel structure of the related art LCD device.
In FIGS. 1 and 2, the structure of a thin film transistor (TFT) array substrate (lower substrate) is illustrated in the fringe field switch (FFS) mode, and it is illustrated that a touch sensor is built in the TFT array substrate in an in-cell touch type.
In FIGS. 1 and 2, a color filter array substrate (upper substrate), a liquid crystal layer, and a driving circuit part for driving a liquid crystal panel are not illustrated.
An active area 1 for displaying an image is formed at the TFT array substrate, and a plurality of pad parts 3 to 5 are formed in an inactive area formed at an outer portion.
A plurality of pixels are formed in the active area 1.
The pad part 3 is a unit on-off pad part, the pad part 4 is a unit FPC pad/unit FPC shorting connection part, and the pad part 5 is a bump input dummy/bump output dummy part.
In FIG. 1, the pad part is illustrated as being formed at an outer portion of an upper end of the panel, but may be formed at an outer portion of each of a left side, right side, and lower end of the panel.
The pixels formed in the active area are defined by intersection between a plurality of data lines (not shown) and gate lines (not shown), respectively. A TFT is formed in each of a plurality of areas defined by intersection between the data lines and the gate lines.
Referring to FIG. 2, each pixel of the related art LCD device includes a TFT, a common electrode 60, and a pixel electrode 90 that are formed on a glass substrate 10.
Specifically, each pixel includes a light shield 20, a buffer layer 22, a TFT, a gate insulator (GI) 36, an inter-layer dielectric (ILD) 40, a plurality of passivation layers (PAS1 and PAS2) 50 and 80, a data contact 45, a common electrode 60, a touch sensing line 70, and a pixel electrode 90.
The TFT is configured with an active 30, a source 32, and a drain 34 that are formed under the gate insulator 36, and a gate 38 formed on the gate insulator 36.
The touch sensing line 70 is formed on the common electrode 60 to cross the pixels, and connects the common electrodes 60 of the respective pixels.
Here, the common electrode 60 supplies a common voltage (Vcom) to a corresponding pixel during a display period, and performs the function of a touch sensing electrode for detecting a touch during a non-display period.
Each pixel having the above-described structure is formed by a manufacturing method illustrated in FIG. 3.
FIG. 3 is a view for describing limitations of a related art method of manufacturing an LCD device. In FIG. 3, a view of a manufacturing method for forming a plurality of layers formed under the inter-layer dielectric 40 is not illustrated.
Referring to FIG. 3, a first passivation layer (PAS1) 50 is formed of photo acryl, on the inter-layer dielectric 40. A first contact hole 55 is formed by etching an area that overlaps the data contact 45. Here, the first passivation layer 50 is formed to a thickness of 3 um, and a top of the data contact 45 is exposed by the first contact hole 55.
Subsequently, the common electrode 60 is formed of a transparent conductive material such as indium tin oxide (ITO) or indium tin zinc oxide (ITZO), in a pixel area in a top of the first passivation layer 50.
Subsequently, the touch sensing line 70 is formed on the common electrode 60, and connects the common electrodes 60 of adjacent pixels.
Subsequently, a second passivation layer (PAS2) 80 is formed on the first passivation layer 50 to cover the common electrode 60 and the touch sensing line 70.
Subsequently, the second passivation layer (PAS2) 80 is etched to expose a top of the data contact 45 by performing an etching process and a photolithography process using a half tone mask, thereby forming a second contact hole 85.
Herewith, a photoresist (PR) 95 is coated on the second passivation layer 80, and a pixel electrode layer is formed of ITO, indium zinc oxide (IZO), or ITZO on the photoresist 95 for forming a pixel electrode.
Subsequently, the pixel electrode layer is patterned, the photoresist 95 is ashed, and then a pixel electrode 90 is formed in a finger shape by performing a lift-off process.
In this case, the pixel electrode 90 is formed in a finger shape on the second passivation layer 80 by using a half tone area of the half tone mask. Furthermore, the second passivation layer 80 in an area overlapping the data contact 45 is etched using a full tone area of the half tone mask. By forming the pixel electrode 90 in a second contact hole 85, the data contact 45 contacts the pixel electrode 90.
In the related art LCD device manufactured by the above-described manufacturing method, the first passivation layer 50 is thickly formed to a thickness of 3 um, and the photoresist 95 is coated to a thickness of 2 um to 3 um.
In coating the photoresist 95, due to planarization characteristic, the thickness of the photoresist 95 formed in a portion corresponding to the full tone area is thickened to 5 um to 6 um. In this case, in a manufacturing process, the photoresist 95 coated for forming the pixel electrode 90 may not all be removed through an ashing process but may be partially left in a contact hole.
Specifically, by adding the thickness (3 um) of the first passivation layer 50 to a target thickness (0.5 um to 1.0 um) of the half tone area, the photoresist 95 is partially left to a thickness of 3.5 um to 5.5 um in a side wall portion of the contact hole.
With the photoresist 95 being partially left, by performing the lift-off process, the photoresist 95 is stripped in the contact hole, causing the loss of the pixel electrode 90.
The photoresist 95 is ashed, and then, by performing the lift-off process, the photoresist 95 that is left in the contact hole is removed, and simultaneously the pixel electrode 90 formed in the contact hole is removed together with the photoresist 95.
FIG. 4 is a view for describing disconnection of a pixel bar that occurs in a pad part of the related art LCD device. In FIG. 4, the unit on-off pad part 3 among the pad parts 3 to 5 is illustrated.
Referring to FIG. 4, the unit on-off pad part 3 among the pad parts 3 to 5 includes a plurality of pads 12 and pixel bars 14.
The unit on-off pad part 3 formed in an outer portion of the panel is formed by a manufacturing process of forming a pixel, in which case the first contact hole 55 is formed by broadly etching the first passivation layer 50 to a size of 250 μm. The unit on-off pad part 3 has a structure in which a pixel pad and the second contact hole 85 of the second passivation layer 80 are arranged in the first contact hole 55.
Connection of the pixel bar 14 is made using the first contact hole 55 portion, and thus, the plurality of pixel pads 12 and the second contact hole 85 are arranged in plurality, in the first contact hole 55.
In a manufacturing process, a pixel area with no second contact hole 85 is formed using the half tone area, and thus, the pixel electrode 90 formed on the second passivation layer 80 is lost in a pad area identically to the pixel area.
In this case, the pixel electrode 90 formed in the pad area cannot act as an electrode receiving a data voltage, unlike a pixel electrode formed in the pixel area, and acts as a contact that connects the pixel bar 14 to the pixel pad 12.
In this way, if the pixel electrode 90 is lost in the pad area, respective signals cannot be supplied to a plurality of pixels formed in the active area, and thus, the test of a manufactured panel is not smoothly performed, and moreover defective driving occurs in which an image cannot normally be displayed.
FIG. 5 is a view for describing disconnection of a pixel bar that occurs in a pad part of the related art LCD device. In FIG. 5, the unit FPC pad part/unit FPC shorting connection part 4 among the pad parts 3 to 5 is illustrated.
Referring to FIG. 5, the unit FPC pad part/unit FPC shorting connection part 4 among the pad parts 3 to 5 includes a plurality of pads 12, pixel bars 14, and power lines 16.
The unit FPC pad part/unit FPC shorting connection part 4 formed in an outer portion of the panel is formed by a manufacturing process of forming a pixel in the active area.
In a manufacturing process, the first contact hole 55 is formed by broadly etching the first passivation layer (PAS1) 50. A plurality of pixel pads are arranged in the first contact hole 55, and the pad 12 is connected to the pixel bar 14.
A data voltage is supplied to a pixel electrode in a pixel area, but the pixel electrode 90 formed in a pad area is formed for performing the function of a contact, without receiving a data voltage. That is, the pixel electrode 90 formed in the pad area acts as a contact that connects the pixel bar 14 to the pixel pad 12.
In a manufacturing process, a pixel area with no second contact hole 85 is formed using the half tone area of a mask. Therefore, the pixel electrode 90 formed on the second passivation layer 80 is lost in the pad area, similarly to the pixel area.
In this way, if the pixel electrode 90 is lost in the pad area, respective signals cannot be supplied to a plurality of pixels formed in the active area. For this reason, the test of a manufactured panel cannot smoothly be performed. Also, defective driving occurs in which an image cannot normally be displayed.
In a method that prevents the defective contact of the pixel bar 14 due to the loss of the pixel electrode 90, there is a method that connects the pad 12 and the pixel bar 14 by using the metal of the touch sensing line 70 in a manufacturing process.
However, the test of the panel is completed, and then a line between the pad 12 and the pixel bar 14 is cut along a scribe line. Therefore, metal that connects the pad 12 and the pixel bar 14 is exposed to the outside.
FIG. 6 is a view illustrating a plurality of masks that are used in a schematic manufacturing method and process of a related art LCD device with integrated touch sensor.
Referring to FIG. 6, a total of eleven masks are used in manufacturing a TFT array substrate with integrated touch sensor, for which a plurality of detailed processes are performed. For example, a plurality of processes of respectively forming a light shield with a mask 1, forming an active with a mask 2, forming a gate with a mask 3, forming a lightly doped drain (LDD) with a mask 4, forming an inter-layer dielectric (ILD) with a mask 5, forming a data contact with a mask 6, forming a first passivation layer (PAS1) with a mask 7, forming a common electrode with a mask 8, forming a conductive line with a mask 9, forming a second passivation layer (PAS2) with a mask 10, and forming a pixel electrode (PXL) with a mask 11 are sequentially performed.
Especially, different masks are used in forming the common electrode and the touch sensing line, and different masks are used in forming the second passivation layer (PAS2) and the pixel electrode (PXL). In this way, in manufacturing the related art LCD device with integrated touch sensor, a number of masks are used, and thus, the manufacturing cost increases.
Moreover, since a detailed process is performed in each mask process, the manufacturing cost is high, and a time taken in manufacturing is long, causing the decrease in product competitiveness.